DSP56857 datasheet(87/662 Pages) FREESCALE

87 / 662 page

Power, Ground and Peripheral Signals

Overview, Rev. 4

Freescale Semiconductor

2-19

Table 2-13. Serial Peripheral Interface

Signal Name

Signal Type

Signal Description

853

Pins

854

Pins

855

Pins

857

Pins

858

Pins

MISO

(GPIOF0)

Input / Output

SPI Master In / Slave Out—This serial data pin is

an input to a master device and an output from a

slave device. The slave device places data on the

MISO line a half-cycle before the clock edge the

master device uses to latch the data. The driver on

this pin can be configured as an open-drain by the

SPI’s Wired-OR mode (WOM) bit when this pin is

configured for SPI operation.

Port F GPIO 0—This is a General Purpose I/O pin

capable of being independently programmed as an

input or output pin.

—

MOSI

(GPIOF1)

Input / Output(Z)

Input / Output

SPI Master Out / Slave In—This serial data pin is

an output from a master device and an input to a

slave device. The master device places data on

the MOSI line a half-cycle before the clock edge

the slave device uses to latch the data. The driver

on this pin can be configured as an open-drain by

the SPI’s Wired-OR mode (WOM) bit when this pin

is configured for SPI operation.

Port F GPIO 1—This is a General Purpose I/O pin

capable of being independently programmed as an

input or output pin.

—

SCK

(GPIOF3)

Input / Output

SPI Serial Clock—This bidirectional pin provides

a serial bit rate clock for the SPI. This gated clock

signal is an input to a slave device and is

generated as an output by a master device. Slave

devices ignore the SCK signal unless the SS pin is

active low. In both master and slave SPI devices,

data is shifted on one edge of the SCK signal and

is sampled on the opposite edge, where data is

stable. The driver on this pin can be configured as

an open-drain driver by the SPI’s WOM bit when

this pin is configured for SPI operation. When

using Wired-OR mode, the user must provide an

external pull-up device.

Port F GPIO 2—This is a General Purpose I/O pin

capable of being independently programmed as an

input or output pin.

—

(GPIOF3)

Input

Input / Output

SPI Slave Select—This input pin selects a slave

device before a master device can exchange data

with the slave device. SS must be low before data

transactions and must stay low for the duration of

the transaction. The SS line of the master must be

held high.

Port F GPIO 3—This is a General Purpose I/O pin

capable of being independently programmed as an

input or output pin.

—

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