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BC9824 Fiches technique(PDF) 9 Page - Holtek Semiconductor Inc |
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BC9824 Fiches technique(HTML) 9 Page - Holtek Semiconductor Inc |
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9 / 22 page ![]() Rev. 1.00 9 October 20, 2015 BC9824 Data and Control Interface TX/RX FIFO ThedataFIFOsareusedtostorepayloadthatistobe transmitted(TXFIFO)orpayloadthatisreceivedand readytobeclockedout(RXFIFO).TheFIFOisac- cessibleinbothPTXmodeandPRXmode. Therearethreelevels32bytesFIFOforbothTXand RX,supportingbothacknowledgemodeornoac- knowledgemodewithuptosixpipes. • TXthreelevels,32byteFIFO • RXthreelevels,32byteFIFO BothFIFOshaveacontrollerandareaccessible throughtheSPIbyusingdedicatedSPIcommands.A TXFIFOinPRXcanstorepayloadforACKpackets tothreedifferentPTXdevices.IftheTXFIFOcon- tainsmorethanonepayloadtoapipe,payloadsare handledusingthefirstinfirstoutprinciple.TheTX FIFOinaPRXisblockedifallpendingpayloadsare addressedtopipeswherethelinktothePTXislost. Inthiscase,theMCUcanflushtheTXFIFObyusing theFLUSH_TXcommand. TheRXFIFOinPRXmaycontainpayloadfromup tothreedifferentPTXdevices. ATXFIFOinPTXcanhaveuptothreepayloads stored. TheTXFIFOcanbewrittentobythreecommands, W_TX_PAYLOADandW_TX_PAYLOAD_NO_ ACKinPTXmodeandW_ACK_PAYLOADinPRX mode.AllthreecommandsgiveaccesstotheTX_ PLDregister. TheRXFIFOcanbereadbythecommandR_RX_ PAYLOADinbothPTXandPRXmode.Thiscom- mandgivesaccesstotheRX_PLDregister. ThepayloadinTXFIFOinaPTXisNOTremovedif theMAX_RTIRQisasserted. IntheFIFO_STATUSregisteritispossibletoreadif theTXandRXFIFOarefullorempty.TheTX_RE- USEbitisalsoavailableintheFIFO_STATUSregis- ter.TX_REUSEissetbytheSPIcommandREUSE_ TX_PL,andisresetbytheSPIcommand:W_TX_ PAYLOADorFLUSHTX. Interrupt InBC9824thereisanactivelowinterrupt(IRQ)pin, whichisactivatedwhenTX_DSIRQ,RX_DRIRQ orMAX_RTIRQaresethighbythestatemachinein theSTATUSregister.TheIRQpinresetswhenMCU writes‘1’totheIRQsourcebitintheSTATUSregis- ter.TheIRQmaskintheCONFIGregisterisusedto selecttheIRQsourcesthatareallowedtoassertthe IRQpin.BysettingoneoftheMASKbitshigh,the correspondingIRQsourceisdisabled.Bydefaultall IRQsourcesareenabled. The3bitpipeinformationintheSTATUSregisteris updatedduringtheIRQpinhightolowtransition.If theSTATUSregisterisreadduringanIRQpinhigh tolowtransition,thepipeinformationisunreliable. SPI Interface • SPICommand TheSPIcommandsareshowninthebelowtable. Everynewcommandmustbestartedbyahighto lowtransitiononCSN. InparalleltotheSPIcommandwordappliedonthe MOSIpin,theSTATUSregisterisshiftedserially outontheMISOpin. TheserialshiftingSPIcommandsisinthefollow- ingformat: ♦ <Commandword:MSBbittoLSBbit(one byte)> ♦ <Databytes:LSBbytetoMSBbyte,MSBbit ineachbytefirst>forallregistersatbank0and register9toregister14atbank1 ♦ <Databytes:MSBbytetoLSBbyte,MSBbitin eachbytefirst>forregister0toregister8atbank1 |
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