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SPEAR320S-2 Fiches technique(PDF) 91 Page - STMicroelectronics

No de pièce SPEAR320S-2
Description  Embedded MPU with ARM926 core for industrial and consumer applications
PDF  113 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR320S-2 Fiches technique(HTML) 91 Page - STMicroelectronics

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SPEAr320S
Timing requirements
Doc ID 022508 Rev 2
91/113
5.10
GPIO/XGPIO timing characteristics
For edge-sensitive signals, the interrupt line is sampled by flip flops clocked by PCLK for
GPIOs and HCLK for XGPIOs, the APB and AHB clocks, normally running at 83 MHz and
166 MHz respectively.
The minimum pulse width required for interrupt detection on signal edge is:
3*TPCLK (36 ns at 83 MHz) for GPIO
3*THCLK (18 ns at 166 MHz) for XGPIO



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