AN4124 datasheet(14/32 Pages) STMICROELECTRONICS

14 / 32 page

FCCU settings

AN4124

14/32

Doc ID 023294 Rev 2

Code

After the core initialization in main function the code is (NMI masked):

if (ME.GS.B.S_CURRENT_MODE == 2){

/* SAFE MODE */

if((FCCU_Clear_CRITICAL_Fault()) == PASS){

/* Test PASS */

}else{

while(1);

/* Test FAIL */

}

}else{

/* DRUN MODE */

/* ----------------- Test INIT --------------------- */

if((tc0_INIT()) == PASS){

/* ----------------- Fake Fault --------------------- */

FCCU.CFF.R = 0;

/* First Fault injection */

}else{

while(1);

/* Test FAIL */

}

/* -----------------END

Test INIT --------------------- */

}

Description

At the beginning the microcontroller is in DRUN mode, the “else” condition is asserted, by

tc0_INIT procedure. In the tc0_INIT, the FCCU will be configured. When the injection fault is

asserted (FCCU.CFF.R = 0), the system will reset. After the start up, in main function the

system is in SAFE mode (the NMI is masked). Then the “if” condition is asserted, and all

faults are cleared.

5.1.1

FCCU init

uint16_t tc0_INIT(void){

/* ----------------- CONFIG State --------------------- */

FCCU_CONFIG_STATE();/* CONFIG state */

FCCU.CFG.B.SM = 1; /* EOUT protocol (dual-rail, time-switching)

fast switching mode*/

FCCU.CFG.B.PS = 1; /* fcc_eout[1] active low, fcc_eout[0] active low */

FCCU_CFG_FOM_Config(CFG_FOM0); /* CFG_FOM0 = Dual-Rail (default state)

[fccu_eout[1:0]= outputs] */

FCCU_CFG_FOP_Config(0); * Fault Output Prescaler= Input clock frequency

(ipg_clk_safe clock) is divided by 2 x 1024 */

/* ----------------- NORMAL State --------------------- */

FCCU_NORMAL_STATE();

/* NORMAL state */

return(PASS);

}

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