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AX2000 Fiches technique(PDF) 26 Page - Microsemi Corporation

No de pièce AX2000
Description  Axcelerator Family FPGAs
PDF  262 Pages
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Fabricant  MICROSEMI [Microsemi Corporation]
Site Internet  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

AX2000 Fiches technique(HTML) 26 Page - Microsemi Corporation

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Detailed Specifications
2- 12
R e v i sio n 1 8
Table 2-8 • I/O Standards Supported by the Axcelerator Family
I/O Standard
Input/Output Supply
Voltage (VCCI)
Input Reference
Voltage (VREF)
Board Termination
Voltage (VTT)
LVTTL
3.3
N/A
N/A
LVCMOS 2.5 V
2.5
N/A
N/A
LVCMOS 1.8 V
1.8
N/A
N/A
LVCMOS 1.5 V (JDEC8-11)
1.5
N/A
N/A
3.3V PCI/PCI-X
3.3
N/A
N/A
GTL+ 3.3 V
3.3
1.0
1.2
GTL+ 2.5 V*
2.5
1.0
1.2
HSTL Class 1
1.5
0.75
0.75
SSTL3 Class 1 and II
3.3
1.5
1.5
SSTL2 Class1 and II
2.5
1.25
1.25
LVDS
2.5
N/A
N/A
LVPECL
3.3
N/A
N/A
Note:
*2.5 V GTL+ is not supported across the full military temperature range.
Table 2-9 • Supply Voltages
VCCA
VCCI
Input Tolerance
Output Drive Level
1.5 V
1.5 V
3.3 V
1.5 V
1.5 V
1.8 V
3.3 V
1.8 V
1.5 V
2.5 V
3.3 V
2.5 V
1.5 V
3.3 V
3.3 V
3.3 V
Table 2-10 • I/O Features Comparison
I/O Assignment
Clamp
Diode
Hot
Insertion
5 V
Tolerance
Input
Buffer
Output
Buffer
LVTTL
No
Yes
Yes1
Enabled/Disabled
3.3 V PCI, 3.3 V PCI-X
Yes
No
Yes1, 2
Enabled/Disabled
LVCMOS 2.5 V
No
Yes
No
Enabled/Disabled
LVCMOS 1.8 V
No
Yes
No
Enabled/Disabled
LVCMOS 1.5 V (JESD8-11)
No
Yes
No
Enabled/Disabled
Voltage-Referenced Input Buffer
No
Yes
No
Enabled/Disabled
Differential, LVDS/LVPECL, Input
No
Yes
No
Enabled
Disabled3
Differential, LVDS/LVPECL, Output
No
Yes
No
Disabled
Enabled4
Notes:
1. Can be implemented with an IDT bus switch.
2. Can be implemented with an external resistor.
3. The OE input of the output buffer must be deasserted permanently (handled by software).
4. The OE input of the output buffer must be asserted permanently (handled by software).



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