CY8C53_11 datasheet(81/106 Pages) CYPRESS

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PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 81 of 106

11.5.7 Voltage Digital to Analog Converter (VDAC)

See the VDAC component data sheet in PSoC Creator for full electrical specifications and APIs.

Unless otherwise specified, all charts and graphs show typical values.

Figure 11-37. VDAC INL vs Input Code, 1 V Mode

Figure 11-38. VDAC DNL vs Input Code, 1 V Mode

Table 11-28. VDAC DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

Resolution

–

bits

INL1

Integral nonlinearity

1 V scale

–

±2.1

±2.5

LSB

DNL1

Differential nonlinearity

1 V scale

–

±0.3

±1

LSB

Rout

Output resistance

1 V scale

–

4 V scale

–

VOUT

Output voltage range, code = 255

1 V scale

–

4 V scale, Vdda = 5 V

–

Monotonicity

–

Yes

–

VOS

Zero scale error

–

±0.9

LSB

Gain error

1 V scale

–

±2.5

4 V scale

–

±2.5

TC_Eg

Temperature coefficient, gain error 1 V scale

–

0.03

%FSR / °C

4 V scale

–

0.03

%FSR / °C

IDD

Operating current

Slow mode

–

100

µA

Fast mode

–

500

µA

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