CY8C53_11 datasheet(7/106 Pages) CYPRESS

7 / 106 page

PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 7 of 106

Figure 2-2. 100-Pin TQFP Part Pinout

TQFP

(GPIO) P2[5]

(GPIO) P2[6]

(GPIO) P2[7]

(I2C0: SCL, SIO) P12[4]

(I2C0: SDA, SIO) P12[5]

(GPIO) P6[4]

(GPIO) P6[5]

(GPIO) P6[6]

(GPIO) P6[7]

Vssb

Ind

Vboost

Vbat

Vssd

XRES

(GPIO) P5[0]

(GPIO) P5[1]

(GPIO) P5[2]

(GPIO) P5[3]

(SWDIO, GPIO) P1[0]

(SWDCK, GPIO) P1[1]

(GPIO) P1[2]

(SWV, GPIO) P1[3]

(GPIO) P1[4]

(GPIO) P1[5]

Vddio0

P0[3] (GPIO, OpAmp0-/Extref0)

P0[2] (GPIO, OpAmp0+)

P0[1] (GPIO, OpAmp0out)

P0[0] (GPIO, OpAmp2out)

P4[1] (GPIO)

P4[0] (GPIO)

P12[3] (SIO)

P12[2] (SIO)

Vssd

Vdda

Vssa

Vcca

P15[3] (GPIO, kHz XTAL: Xi)

P15[2] (GPIO, kHz XTAL: Xo)

P12[1] (SIO, I2C1: SDA)

P12[0] (SIO, I2C1: SCL)

P3[7] (GPIO, OpAmp3out)

P3[6] (GPIO, OpAmp1out)

Lines show Vddio

to I/O supply

association

Note

4. Pins are Do Not Use (DNU) on devices without USB. The pin must be left floating.

[+] Feedback

CY8C53 Fiches technique(PDF) 7 Page - Cypress Semiconductor

CY8C53 Fiches technique(HTML) 7 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Fiches technique Télécharger

Lien URL