CY8C53_11 datasheet(59/106 Pages) CYPRESS

59 / 106 page

PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 59 of 106

11.2 Device Level Specifications

Specifications are valid for –40 °C

≤ T

A ≤ 85 °C and TJ ≤ 100 °C, except where noted. Specifications are valid for 2.7 V to 5.5 V, except

where noted.

11.2.1 Device Level Specifications

Table 11-2. DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

VDDA

Analog supply voltage and input to

analog core regulator

Analog core regulator enabled

2.7

–

5.5

VDDA

Analog supply voltage, analog regulator

bypassed

Analog core regulator disabled

1.71

1.8

1.89

VDDD

Digital supply voltage relative to VSSD

Digital core regulator enabled

2.7

–

VDDA

[10]

VDDD

Digital supply voltage, digital regulator

bypassed

Digital core regulator disabled

1.71

1.8

1.89

VDDIO

[11]

I/O supply voltage relative to VSSIO

2.7

–

VDDA

[10]

VCCA

Direct analog core voltage input (Analog

regulator bypass)

Analog core regulator disabled

1.71

1.8

1.89

VCCD

Direct digital core voltage input (Digital

regulator bypass)

Digital core regulator disabled

1.71

1.8

1.89

IDD

[12]

Active Mode, VDD = 2.7 V – 5.5 V

Execute from Flash cache, see Cache

Controller on page 12 and Flash

Program Memory on page 16

CPU at 6 MHz

T = –40 °C

–

T = 25 °C

–

T = 85 °C

–

Sleep Mode[13]

CPU = OFF

RTC = ON (= ECO32K ON, in low power

mode)

Sleep timer = ON (= ILO ON at 1 kHz)

WDT = OFF

POR = ON

Boost = OFF

SIO pins in single ended input, unregu-

lated output mode

VDD = VDDIO = 4.5–5.5 V

T = –40 °C

–

µA

T = 25 °C

–

µA

T = 85 °C

–

µA

VDD = VDDIO = 2.7–3.6 V

T = –40 °C

–

µA

T = 25 °C

–

µA

T = 85 °C

–

µA

Hibernate Mode

Hibernate mode current

All regulators and oscillators off.

SRAM retention

GPIO interrupts are active

Boost = OFF

SIO pins in single ended input, unregu-

lated output mode

VDD = VDDIO = 4.5–5.5 V

T = –40 °C

–

T = 25 °C

–

T = 85 °C

–

VDD = VDDIO = 2.7–3.6 V

T = –40 °C

–

T = 25 °C

–

1000

–

T = 85 °C

–

Notes

10. The power supplies can be brought up in any sequence however once stable VDDA must be greater than or equal to all other supplies.

11. The VDDIO supply voltage must be greater than the maximum analog voltage on the associated GPIO pins. Maximum analog voltage on GPIO pin ≤ VDDIO ≤ VDDA.

12. The current consumption of additional peripherals that are implemented only in programmed logic blocks can be found in their respective data sheets, available in

PSoC Creator, the integrated design environment. To estimate total current, find CPU current at frequency of interest and add peripheral currents for your particular

system from the device data sheet and component data sheets.

13. Sleep timer generates periodic interrupts to wake up the CPU. This specification applies only to those times that the CPU is off.

[+] Feedback

CY8C53 Fiches technique(PDF) 59 Page - Cypress Semiconductor

CY8C53 Fiches technique(HTML) 59 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Fiches technique Télécharger

Lien URL