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SH7708 Fiches technique(PDF) 103 Page - Renesas Technology Corp

No de pièce SH7708
Description  SuperH??RISC engine
PDF  633 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7708 Fiches technique(HTML) 103 Page - Renesas Technology Corp

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85
IF
Instruction n
ID
EX
MA
TLB miss (data access)
WB
IF
Instruction n + 1
Instruction n + 2
ID
EX
MA
TLB miss (instruction access)
WB
IF
ID
EX
MA
RIE (reserved instruction exception)
WB
Pipeline Sequence:
TLB miss (instruction n)
Re-execution of instruction n
1
2
3
TLB miss (instruction n + 1)
Re-execution of instruction n + 1
RIE (instruction n + 2)
IF
ID
EX
MA
WB
= Instruction fetch
= Instruction decode
= Instruction execution
= Memory access
= Write back
Handling Order:
Program Order:
TLB miss (instruction n+1)
TLB miss (instruction n) and RIE (instruction n + 2) = simultaneous detection
Detection Order:
Figure 4.2 Example of Acceptance Order of General Exceptions
All exceptions other than a reset are detected in the pipeline ID stage, and accepted on instruction
boundaries. However, an exception is not accepted between a delayed branch instruction and the
delay slot. A re-execution type exception detected in a delay slot is accepted before execution of
the delayed branch instruction. A completion type exception detected in a delayed branch
instruction or delay slot is accepted after execution of the delayed branch instruction. The delay



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