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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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L99PM72PXP Fiches technique(PDF) 82 Page - STMicroelectronics |
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L99PM72PXP Fiches technique(HTML) 82 Page - STMicroelectronics |
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82 / 128 page  ST SPI L99PM72PXP 82/128 Doc ID 023553 Rev 3 6.1.9 Format of data shifted out at SDO during Read cycle Failures are indicated by activating the corresponding bit of the <Global Status> register. The returned data byte(s) represent(s) the content of the register to be read. Figure 42. Format of data shifted out at SDO during read cycle Table 58. Format of data shifted out at SDO during read cycle: global status register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Global error flag (GEF) Communication error Not (chip reset OR comm error) TSD2 TSD1 V1 Fail VS Fail (OV/UV) Fail safe Table 59. Format of data shifted out at SDO during read cycle: data byte 1 MSB Previous content of addressed register LSB D15 D14 D13 D12 D11 D10 D9 D8 Table 60. Format of data shifted out at SDO during read cycle: data byte 2 MSB Previous content of addressed register LSB D7 D6 D5 D4 D3 D2 D1 D0 |
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