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HC705CT4GRS/D Fiches technique(PDF) 52 Page - NXP Semiconductors

No de pièce HC705CT4GRS/D
Description  General Release Specification
PDF  152 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705CT4GRS/D Fiches technique(HTML) 52 Page - NXP Semiconductors

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Operating Modes
General Release Specification
MC68HC705CT4 — Rev. 2.0
52
Operating Modes
MOTOROLA
6.5.3 Wait Mode
The WAIT instruction places the MCU in a low power-consumption
mode, but the wait mode consumes more power than the stop mode. All
CPU action is suspended, but the core timer, the oscillator, and any
enabled module remain active. Any interrupt or reset will cause the MCU
to exit the wait mode. The user must shut off subsystems to reduce
power consumption. WAIT current specifications assume CPU
operation only and do not include current consumption by any other
subsystems.
Figure 6-2. Stop Recovery Timing Diagram
1FFE
1FFE
1FFE
1FFE
1FFF
INTERNAL
ADDRESS
BUS
INTERNAL
CLOCK
IRQ/VPP
3
IRQ/VPP
2
RESET
OSC1
1
t
ILCH
4064 tcyc
RESET OR INTERRUPT
VECTOR FETCH
t
LIH
t
RL
NOTES:
1. Represents the internal gating of the OSC1 pin
2. IRQ/VPP pin edge-sensitive mask option
3. IRQ/VPP pin level- and edge-sensitive mask option
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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