HC705JJ7GRSSLASHD datasheet(192/230 Pages) NXP

No de pièce	HC705JJ7GRS/D

Description	Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)

PDF	230 Pages

Scroll/Zoom	100%

Fabricant	NXP [NXP Semiconductors]

Site Internet	http://www.nxp.com

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192 / 230 page

Instruction Set

General Release Specification

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

Instruction Set

14.4.1 Register/Memory Instructions

These instructions operate on CPU registers and memory locations.

Most of them use two operands. One operand is in either the

accumulator or the index register. The CPU finds the other operand in

memory.

Table 14-1. Register/Memory Instructions

Instruction

Mnemonic

Add Memory Byte and Carry Bit to Accumulator

ADC

Add Memory Byte to Accumulator

ADD

AND Memory Byte with Accumulator

AND

Bit Test Accumulator

BIT

Compare Accumulator

CMP

Compare Index Register with Memory Byte

CPX

EXCLUSIVE OR Accumulator with Memory Byte

EOR

Load Accumulator with Memory Byte

LDA

Load Index Register with Memory Byte

LDX

Multiply

MUL

OR Accumulator with Memory Byte

ORA

Subtract Memory Byte and Carry Bit from Accumulator

SBC

Store Accumulator in Memory

STA

Store Index Register in Memory

STX

Subtract Memory Byte from Accumulator

SUB

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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