HC705JJ7GRSSLASHD datasheet(191/230 Pages) NXP

No de pièce	HC705JJ7GRS/D

Description	Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)

PDF	230 Pages

Scroll/Zoom	100%

Fabricant	NXP [NXP Semiconductors]

Site Internet	http://www.nxp.com

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191 / 230 page

Instruction Set

Instruction Types

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

Instruction Set

14.3.8 Relative

Relative addressing is only for branch instructions. If the branch

condition is true, the CPU finds the effective branch destination by

adding the signed byte following the opcode to the contents of the

program counter. If the branch condition is not true, the CPU goes to the

next instruction. The offset is a signed, two’s complement byte that gives

a branching range of –128 to +127 bytes from the address of the next

location after the branch instruction.

When using the Motorola assembler, the programmer does not need to

calculate the offset, because the assembler determines the proper offset

and verifies that it is within the span of the branch.

14.4 Instruction Types

The MCU instructions fall into the following five categories:

•

Read-Modify-Write Instructions

•

Jump/Branch Instructions

•

Bit Manipulation Instructions

•

Control Instructions

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705JJ7GRS/D Fiches technique(PDF) 191 Page - NXP Semiconductors