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DRV8317 Fiches technique(PDF) 46 Page - Texas Instruments

No de pièce DRV8317
Description  DRV8317 Three-Phase PWM Motor Driver
PDF  69 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
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DRV8317 Fiches technique(HTML) 46 Page - Texas Instruments

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8.6.8 SYSF_CTRL Register (Offset = 12h) [Reset = 0553h]
SYSF_CTRL is shown in Figure 8-35 and described in Table 8-18.
Return to the Table 8-9.
Figure 8-35. SYSF_CTRL Register
15
14
13
12
11
10
9
8
PARITY
RESERVED
DNRDY_EN
OTW_FET_EN
RESERVED
R/W-0h
R-0-0h
R/W-1h
R/W-0h
R/W-1h
7
6
5
4
3
2
1
0
VMUV_WARN_
EN
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
R/W-0h
R/W-1h
R-0-0h
R/W-1h
R-0-0h
R/W-1h
R/W-1h
Table 8-18. SYSF_CTRL Register Field Descriptions
Bit
Field
Type
Reset
Description
15
PARITY
R/W
0h
Parity Bit if SPI_PEN is set to '1' otherwise reserved
14-11
RESERVED
R-0
0h
Reserved
10
DNRDY_EN
R/W
1h
Device not ready fault enable
0h = Device not ready fault is disabled
1h = Device not ready fault is enabled
9
OTW_FET_EN
R/W
0h
FET over temperature warning fault enable
0h = FET over temperature warning is disabled
1h = FET over temperature warning is enabled
8
RESERVED
R/W
1h
Reserved
7
VMUV_WARN_EN
R/W
0h
VM under voltage warn fault enable
0h = VM under voltage warning fault is disabled
1h = VM under voltage warning fault is enabled
6
RESERVED
R/W
1h
Reserved
5
RESERVED
R-0
0h
Reserved
4
RESERVED
R/W
1h
Reserved
3-2
RESERVED
R-0
0h
Reserved
1
RESERVED
R/W
1h
Reserved
0
RESERVED
R/W
1h
Reserved
DRV8317
SLVSGT3 – DECEMBER 2022
www.ti.com
46
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Product Folder Links: DRV8317



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