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DRV8317 Fiches technique(PDF) 37 Page - Texas Instruments

No de pièce DRV8317
Description  DRV8317 Three-Phase PWM Motor Driver
PDF  69 Pages
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Site Internet  http://www.ti.com
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DRV8317 Fiches technique(HTML) 37 Page - Texas Instruments

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8.6 DRV8317 Registers
Table 8-9 lists the memory-mapped registers for the DRV8317 registers. All register offset addresses not listed in
Table 8-9 should be considered as reserved locations and the register contents should not be modified.
Table 8-9. DRV8317 Registers
Offset
Acronym
Register Name
Section
0h
DEV_STS
Device Status Register
Section 8.6.1
2h
DEV_RSTS
Device Raw Status Register
Section 8.6.2
4h
OT_STS
Over Temperature Status Register
Section 8.6.3
5h
SUP_STS
Supply Status Register
Section 8.6.4
6h
DRV_STS
Driver Status Register
Section 8.6.5
7h
SYSIF_STS
System Interface Status Register
Section 8.6.6
10h
FLT_MODE
Fault Mode Register
Section 8.6.7
12h
SYSF_CTRL
System Fault Control Register
Section 8.6.8
13h
DRVF_TCTRL
Driver Fault Control Register
Section 8.6.9
16h
FLT_TCTRL
Fault Timing Control Register
Section 8.6.10
17h
FLT_CLR
Fault Clear Register
Section 8.6.11
18h
VMUV_WARN_THR
VM Under Voltage Warn Threshold Register
Section 8.6.12
20h
PWM_CTRL
PWM Control Register
Section 8.6.13
22h
DRV_CTRL
Predriver control Register
Section 8.6.14
23h
CSA_CTRL
CSA Control Register
Section 8.6.15
3Fh
SYS_CTRL
System Control Register
Section 8.6.16
Complex bit access types are encoded to fit into small table cells. Table 8-10 shows the codes that are used for
access types in this section.
Table 8-10. DRV8317 Access Type Codes
Access Type
Code
Description
Read Type
R
R
Read
R-0
R
-0
Read
Returns 0s
Write Type
W
W
Write
Reset or Default Value
-n
Value after reset or the default
value
www.ti.com
DRV8317
SLVSGT3 – DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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