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ACEX1 Fiches technique(PDF) 11 Page - List of Unclassifed Manufacturers

No de pièce ACEX1
Description  Programmable Logic Device Family
PDF  86 Pages
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Fabricant  ETC [List of Unclassifed Manufacturers]
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ACEX1 Fiches technique(HTML) 11 Page - List of Unclassifed Manufacturers

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Altera Corporation
11
ACEX 1K Programmable Logic Device Family Data Sheet
13
Figure 3. ACEX 1K EAB in Dual-Port RAM Mode
Figure 4. ACEX 1K Device in Single-Port RAM Mode
Note:
(1)
EP1K10, EP1K30, and EP1K50 devices have 88 EAB local interconnect channels; EP1K100 devices have 104 EAB
local interconnect channels.
Port A
Port B
address_a[]
address_b[]
data_a[]
data_b[]
we_a
we_b
clkena_a
clkena_b
Clock A
Clock B
Column Interconnect
EAB Local
Interconnect (1)
Dedicated Inputs
& Global Signals
DQ
DQ
RAM/ROM
256
× 16
512
× 8
1,024
× 4
2,048
× 2
Data In
Address
Write Enable
Data Out
4, 8, 16, 32
4, 8, 16, 32
DQ
DQ
4
8, 4, 2, 1
8, 9, 10, 11
Row Interconnect
Dedicated
Clocks
2
4, 8
Chip-Wide
Reset



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