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ACEX1 Fiches technique(PDF) 43 Page - List of Unclassifed Manufacturers

No de pièce ACEX1
Description  Programmable Logic Device Family
PDF  86 Pages
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ACEX1 Fiches technique(HTML) 43 Page - List of Unclassifed Manufacturers

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Altera Corporation
43
ACEX 1K Programmable Logic Device Family Data Sheet
13
Notes to tables:
(1)
The most significant bit (MSB) is on the left.
(2)
The least significant bit (LSB) for all JTAG IDCODEs is 1.
ACEX 1K devices include weak pull-up resistors on the JTAG pins.
f For more information, see the following documents:
s
Application Note 39 (IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in
Altera Devices)
s
ByteBlasterMV Parallel Port Download Cable Data Sheet
s
BitBlaster Serial Download Cable Data Sheet
s
Jam Programming & Test Language Specification
Figure 20 shows the timing requirements for the JTAG signals.
Table 16. 32-Bit IDCODE for ACEX 1K Devices
Note (1)
Device
IDCODE (32 Bits)
Version
(4 Bits)
Part Number (16 Bits)
Manufacturer’s
Identity (11 Bits)
1 (1 Bit) (2)
EP1K10
0001
0001 0000 0001 0000
00001101110
1
EP1K30
0001
0001 0000 0011 0000
00001101110
1
EP1K50
0001
0001 0000 0101 0000
00001101110
1
EP1K100
0010
0000 0001 0000 0000
00001101110
1



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