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PC87366 Fiches technique(PDF) 66 Page - National Semiconductor (TI) |
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PC87366 Fiches technique(HTML) 66 Page - National Semiconductor (TI) |
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66 / 240 page ![]() 2.0 Device Architecture and Configuration (Continued) 66 www.national.com 2.14.3 KBC Configuration Register This register is reset by hardware to 40h. Location: Index F0h Type: R/W Usage Hints: 1. To change the clock frequency of the KBC, perform the following: a. Disable the KBC logical devices. b. Change the frequency setting. c. Enable the KBC logical devices. Bit 76543210 Name KBC Clock Source Reserved TRI-STATE Control Reset 01000000 Required 0 Bit Description 7-6 KBC Clock Source. The clock source can be changed only when the KBC is inactive (disabled). Bits 7 6 Source 0 0 8 MHz 0 1 12 MHz (default) 1 0 16 MHz 1 1 Reserved 5-1 Reserved 0 TRI-STATE Control. If KBD is inactive (disabled) when this bit is set, the KBD pins (KBCLK and KBDAT) are in TRI- STATE. If Mouse is inactive (disabled) when this bit is set, the Mouse pins (MCLK and MDAT) are in TRI-STATE. 0: Disabled (default) 1: Enabled |
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