STS1TX datasheet(51/70 Pages) STMICROELECTRONICS

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STS1TX

MCU interface

All interrupts are reported on a set of interrupt status registers and are individually

maskable. The interrupt status register must be cleared upon a read event from the MCU.

The status of all the interrupts is reported on the IRQ_STATUS[3:0] registers: bits are high

for the events that have generated any interrupts. The interrupts are individually maskable

using the IRQ_MASK[3:0] registers: if the mask bit related to a particular event is

programmed at 0, that event does not generate any interrupt request.

10.3

GPIOs

The total number of GPIO pins is 4. Each pin is individually configurable.

Digital outputs can be selected from the following (see GPIOx_CONF register):

Device status related

Not used

READY(1)

STANDBY state switching in progress

Low battery level

Power-on reset

Brownout event

LOCK

Others

Not used

AES end–of–operation

1. The interrupt flag n.16 is set each time the STS1TX goes to READY state and the XO has

completed its setting transient (XO ready condition detected).

Table 29. Interrupts (continued)

Bit

Events group

Interrupt event

Table 30. Digital outputs

I/O selection

Output signal

nIRQ (interrupt request, active low)

POR inverted (active low)

Wakeup timer expiration: ‘1’ when WUT has expired

Low battery detection: ‘1’ when battery is below threshold setting

TX data internal clock output (TX data are sampled on the rising edge of it)

TX state indication: ‘1’ when the STS1TX is transiting in the TX state

TX FIFO almost empty flag

TX FIFO almost full flag

Not used

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