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STS1TX Fiches technique(PDF) 50 Page - STMicroelectronics

No de pièce STS1TX
Description  Industrial monitoring and control
PDF  70 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STS1TX Fiches technique(HTML) 50 Page - STMicroelectronics

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MCU interface
STS1TX
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DocID025109 Rev 1
Read and write operations are persistently executed while CSn is kept active (low), the
address being automatically incremented (burst mode).
Accessing the FIFO is done as usual with the read and write commands, by putting, as the
address, the code 0xFF. Burst mode is available to access the sequence of bytes in the
FIFO. Clearly, TX-FIFO with a write operation.
Details of the SPI parameters are reported below.
10.2
Interrupts
In order to notify the MCU of a certain number of events an interrupt signal is generated on
a selectable GPIO. The following events trigger an interrupt to the MCU:
Table 28. SPI interface timing requirements
Symbol
Parameter
Min.
Max.
Unit
fSCLK
SCLK frequency
10
MHz
tsp
CSn low to positive edge on SCLK
2
µs
Table 29. Interrupts
Bit
Events group
Interrupt event
0
Packet oriented
Not used
1
Not used
2TX data sent
3
Not used
4
Not used
5
TX FIFO underflow/overflow error
6
Not used
7
TX FIFO almost full
8
TX FIFO almost empty
9
Not used
10
Not used
11
Not used
12
Signal quality related
Not used
13
Not used
14
Not used



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