STS1TX datasheet(27/70 Pages) STMICROELECTRONICS

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STS1TX

Block description

8.1

Power management

The STS1TX integrates a high efficiency step-down converter cascaded with LDOs meant

to supply both analog and digital parts. However, an LDO directly fed by the external battery

provides a controlled voltage to the data interface block.

8.1.1

Switching frequency

The SMPS switching frequency can be provided either by a divider by four or by a

programmable rate multiplier. The divider by four or the rate multiplier is activated when the

EN_RM bit is set to both 0 and 1 in the PM_CONFIG[2:0] register bank. When the rate

multiplier is activated, the divider ratio can be programmed by KRM[14:0] word in the

PM_CONFIG[2:0] register bank. In this case, the SMPS switching frequency is given by the

following formula:

The SMPS runs properly when the bits SET_SMPS_VTUNE and SET_SMPS_PLLBW (see

PM_CONFIG[2:0] register bank) are set according to the programmed switching frequency.

8.2

Power-on-reset (POR)

The power-on-reset circuit generates a reset pulse upon power-up which is used to initialize

the entire digital logic. Power-on-reset senses VBAT voltage.

8.3

Low battery indicator

The battery indicator can provide the user with an indication of the battery voltage level.

There are two blocks to detect battery level:

•

Brownout with a fixed threshold as defined inTable 17: Battery indicator and low battery

detector

•

Battery level detector with a programmable threshold as defined in Table 17: Battery

indicator and low battery detector.

Table 22. SMPS configuration settings

SET_SMPS_PLLBW

SET_SMPS_VTUNE

Switching frequency range

2.0 MHz - 4.5 MHz

3.5 MHz - 7.0 MHz

4.5 MHz - 7.5 MHz

4.5 MHz - 10 MHz

Fsw

KRM fCLK

⋅

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