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STS1TX Fiches technique(PDF) 7 Page - STMicroelectronics |
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STS1TX Fiches technique(HTML) 7 Page - STMicroelectronics |
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7 / 70 page ![]() DocID025109 Rev 1 7/70 STS1TX Introduction 2 Introduction A simplified block diagram of the STS1TX is shown in Figure 1. Figure 1. STS1TX block diagram The transmitter part of the STS1TX is based on direct synthesis of the RF frequency. The power amplifier (PA) input is the LO generated by the RF synthesizer, while the output level can be configured between -30 dBm and +11 dBm in 0.5 dB steps. The data to be transmitted can be provided by an external MCU either through the 96-byte TX FIFO writable via SPI, or directly using a programmable GPIO pin. The STS1TX supports frequency hopping, extending the link range and improving performance. The STS1TX has a very efficient power management (PM) system. An integrated switched mode power supply (SMPS) regulator allows operation from a battery voltage ranging from +1.8 V to +3.6 V, and with power conversion efficiency of at least 80%. A crystal must be connected between XIN and XOUT. It is digitally configurable to operate with different crystals. As an alternative, an external clock signal can be used to feed XIN for proper operation. The STS1TX also has an integrated low-power RC oscillator, generating the 34.7 kHz signal used as a clock for the slowest timeouts (i.e. sleeping and backoff). A standard 4-pin SPI bus is used to communicate with the external MCU. Four configurable general purpose I/Os are available. PA FREQ SYNTH REGISTERS MAP RADIO CONTROL RCO ΔΔΔΔΣΣΣΣ Low Power Digital LDO TEMP SENS TX SDO SDI SCLK CSn GPIO_3 GPIO_2 GPIO_1 GPIO_0 VR DIG SDN GND PA POR AES LDO 1V5 CENTRAL BIAS BOR (raw) BOR (acc) BLD XO RM SMPS DIG I/O 1/2 GAMS080520131020FSR |
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