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EM73361A Fiches technique(PDF) 6 Page - ELAN Microelectronics Corp |
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EM73361A Fiches technique(HTML) 6 Page - ELAN Microelectronics Corp |
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6 / 33 page ![]() 6 * This specification are subject to be changed without notice. 10.8.2001 EM73361A EM73361A EM73361A EM73361A EM73361A 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT When user using any instruction of CALL or subroutine, before entry the subroutine, the previous PC address will be saved into stack until return from those subroutines, the PC value will be restored by the data saved in stack. DATA AREA: Except the special area used by user, the whole RAM can be used as data area for storing and loading general data. ADDRESSING MODE (1) Indirect addressing mode: Indirect addressing mode indicates the RAM address by specified HL register. For example: LDAM ; Acc ← RAM[HL] STAM ; RAM[HL] ← Acc (2) Direct addressing mode: Direct addressing mode indicates the RAM address by immediate data. For example: LDA x ; Acc ← RAM[x] STA x ; RAM[x] ← Acc (3) Zero-page addressing mode For zero-page region, user can using direct addressing to write or do any arithematic, comparsion or bit manupulated operation directly. For example: STD #k,y ; RAM[y] ← #k ADD #k,y; RAM[y] ← RAM[y] + #k PROGRAM COUNTER (3K ROM) PROGRAM COUNTER (3K ROM) PROGRAM COUNTER (3K ROM) PROGRAM COUNTER (3K ROM) PROGRAM COUNTER (3K ROM) Program counter ( PC ) is composed by a 12-bit counter, which indicates the next executed address for the instruction of program ROM. For a 3K - byte size ROM, PC can indicate address form 000h - BFFh, for BRANCH and CALL instrcutions, PC is changed by instruction indicating. (1) Branch instruction: (1) Branch instruction: (1) Branch instruction: (1) Branch instruction: (1) Branch instruction: SBR a SBR a SBR a SBR a SBR a Object code: 00aa aaaa Condition: SF=1; PC ← PC 11-6.a ( branch condition satisified ) PC Hold original PC value+1 a aaaaa SF=0; PC ← PC +1( branch condition not satisified) PC Original PC value + 1 LBR a LBR a LBR a LBR a LBR a Object code: 1100 aaaa aaaa aaaa Condition: SF=1; PC ← a ( branch condition satisified) PC aaaaaaaaaaaa |
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