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PCI1221 Fiches technique(PDF) 21 Page - Texas Instruments |
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PCI1221 Fiches technique(HTML) 21 Page - Texas Instruments |
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21 / 123 page ![]() PCI1221 GHK/PDV PC CARD CONTROLLERS SCPS042 – JULY 1998 21 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) CardBus PC Card interface control (slots A and B) TERMINAL PIN NUMBER I/O FUNCTION NAME SLOT A† SLOT B‡ TYPE FUNCTION PDV GHK PDV GHK CAUDIO 137 J15 71 W9 I CardBus audio. CAUDIO is a digital input signal from a PC Card to the system speaker. The PCI1221 supports the binary audio mode and outputs a binary signal from the card to SPKROUT. CBLOCK 107 P15 42 N6 I/O CardBus lock. CBLOCK is used to gain exclusive access to a target. CCD1 82 V11 16 H3 I CardBus detect 1 and CardBus detect 2. CCD1 and CCD2 are used in conjunction with CVS1 and CVS2 to identify card insertion and interrogate cards to determine CCD2 140 H17 74 R9 I with CVS1 and CVS2 to identify card insertion and interrogate cards to determine the operating voltage and card type. CDEVSEL 111 P17 47 R1 I/O CardBus device select. The PCI1221 asserts CDEVSEL to claim a CardBus cycle as the target device. As a CardBus initiator on the bus, the PCI1221 monitors CDEVSEL until a target responds. If no target responds before timeout occurs, the PCI1221 terminates the cycle with an initiator abort. CFRAME 116 N17 51 R3 I/O CardBus cycle frame. CFRAME is driven by the initiator of a CardBus bus cycle. CFRAME is asserted to indicate that a bus transaction is beginning, and data transfers continue while this signal is asserted. When CFRAME is deasserted, the CardBus bus transaction is in the final data phase. CGNT 110 R19 46 P3 I CardBus bus grant. CGNT is driven by the PCI1221 to grant a CardBus PC Card access to the CardBus bus after the current data transaction has been completed. CINT 135 J17 69 V8 I CardBus interrupt. CINT is asserted low by a CardBus PC Card to request interrupt servicing from the host. CIRDY 115 M14 50 P5 I/O CardBus initiator ready. CIRDY indicates the CardBus initiator’s ability to complete the current data phase of the transaction. A data phase is completed on a rising edge of CCLK when both CIRDY and CTRDY are asserted. Until CIRDY and CTRDY are both sampled asserted, wait states are inserted. CPERR 108 N14 43 P1 I/O CardBus parity error. CPERR is used to report parity errors during CardBus transactions, except during special cycles. It is driven low by a target two clocks following that data when a parity error is detected. CREQ 127 L14 61 R7 I CardBus request. CREQ indicates to the arbiter that the CardBus PC Card desires use of the CardBus bus as an initiator. CSERR 136 J14 70 W8 I CardBus system error. CSERR reports address parity errors and other system errors that could lead to catastrophic results. CSERR is driven by the card synchronous to CCLK, but deasserted by a weak pullup, and may take several CCLK periods. The PCI1221 can report CSERR to the system by assertion of SERR on the PCI interface. CSTOP 109 R18 45 N5 I/O CardBus stop. CSTOP is driven by a CardBus target to request the initiator to stop the current CardBus transaction. CSTOP is used for target disconnects, and is commonly asserted by target devices that do not support burst data transfers. CSTSCHG 138 H19 72 V9 I CardBus status change. CSTSCHG is used to alert the system to a change in the card’s status, and is used as a wake-up mechanism. CTRDY 114 P19 49 R2 I/O CardBus target ready. CTRDY indicates the CardBus target’s ability to complete the current data phase of the transaction. A data phase is completed on a rising edge of CCLK, when both CIRDY and CTRDY are asserted; until this time, wait states are inserted. CVS1 134 J18 68 U8 I/O CardBus voltage sense 1 and CardBus voltage sense 2. CVS1 and CVS2 are used in conjunction with CCD1 and CCD2 to identify card insertion and interrogate cards CVS2 122 M19 56 P7 I/O in conjunction with CCD1 and CCD2 to identify card insertion and interrogate cards to determine the operating voltage and card type. † Terminal name for slot A is preceded with A_. For example, the full name for terminals 137 and J15 are A_CAUDIO. ‡ Terminal name for slot B is preceded with B_. For example, the full name for terminals 71 and W9 are B_CAUDIO. |
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