PCI1221 datasheet(39/123 Pages) TI

39 / 123 page

PCI1221 GHK/PDV

PC CARD CONTROLLERS

SCPS042 – JULY 1998

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

power management overview

TI has expended great effort to provide a high-performance device with low power consumption. In addition to

the low-power CMOS technology process used for the PCI1221, various features are designed into the device

to allow implementation of popular power-saving techniques. These features and techniques are discussed in

this section.

clock run protocol

The PCI CLKRUN feature is the primary method of power management on the PCI interface of the PCI1221.

CLKRUN signalling is provided through the MFUNC6 terminal. Since some chip sets do not implement

CLKRUN, this is not always available to the system designer, and alternate power savings features are

provided. For details on the CLKRUN protocol refer to the

PCI Mobile Design Guide.

The PCI1221 does not permit the central resource to stop the PCI clock under any of the following conditions:

D The KEEPCLK bit in the system control register is set.

D The PC Card-16 resource manager is busy.

D The PCI1221 CardBus master state machine is busy. A cycle may be in progress on CardBus.

D The PCI1221 master is busy. There may be posted data from CardBus to PCI in the PCI1221.

D There are pending interrupts.

D The CardBus CCLK for either socket has not been stopped by the PCI1221 CLKRUN manager.

The PCI1221 restarts the PCI clock using the CLKRUN protocol under any of the following conditions:

D A PC Card-16 IREQ or a CardBus CINT has been asserted by either card.

D A CardBus wakeup (CSTSCHG) or PC Card-16 STSCHG/RI event occurs in either socket.

D A CardBus attempts to start the CCLK using CCLKRUN.

D A CardBus card arbitrates for the CardBus bus using CREQ.

CardBus PC card power management

The PCI1221 implements its own card power management engine that can be used to turn off the CCLK to a

socket when there is no activity to the CardBus PC Card. The PCI clock-run protocol is followed on the CardBus

CCLKRUN interface to control this clock management.

16-Bit PC card power mManagement

The COE and PWRDOWN bits in the ExCA registers are provided for 16-bit PC Card power management. The

COE bit three states the card interface to save power. The power savings when using this feature are minimal.

The COE bit will reset the PC Card when used, and the PWRDOWN bit will not. Furthermore, the PWRDOWN

bit is an automatic COE, that is, the PWRDOWN performs the COE function when there is no card activity.

NOTE:

The 16-bit PC Card must implement the proper pullup resistors for the COE and PWRDOWN

modes.

PCI1221 Fiches technique(PDF) 39 Page - Texas Instruments