A14100A-RQ208C datasheet(17/68 Pages) ACTEL

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Accelerator Series FPGAs – ACT ™ 3 Family

Active Power Component

Power dissipation in CMOS devices is usually dominated by

the active (dynamic) power dissipation. This component is

frequency dependent, a function of the logic and the external

I/O. Active power dissipation results from charging internal

chip capacitances of the interconnect, unprogrammed

antifuses, module inputs, and module outputs, plus external

capacitance due to PC board traces and load device inputs.

An additional component of the active power dissipation is

the totem-pole current in CMOS transistor pairs. The net

effect can be associated with an equivalent capacitance that

can be combined with frequency and voltage to represent

active power dissipation.

Equivalent Capacitance

The power dissipated by a CMOS circuit can be expressed by

the Equation 2.

Power (uW) = CEQ * VCC

2 * F

(2)

Where:

CEQ is the equivalent capacitance expressed in pF.

VCC is the power supply in volts.

F is the switching frequency in MHz.

Equivalent capacitance is calculated by measuring ICCactive

at a specified frequency and voltage for each circuit

component of interest. Measurements have been made over a

range of frequencies at a fixed value of VCC. Equivalent

capacitance is frequency independent so that the results may

be used over a wide range of operating conditions. Equivalent

capacitance values are shown below.

CEQ Values for Actel FPGAs

To calculate the active power dissipated from the complete

design, the switching frequency of each part of the logic must

be known. Equation 3 shows a piece-wise linear summation

over all components.

Power =VCC2 * [(m * CEQM* fm)modules + (n * CEQI* fn)inputs

+ (p * (CEQO+ CL) * fp)outputs

+ 0.5 * (q1 * CEQCR * fq1)routed_Clk1 + (r1 * fq1)routed_Clk1

+ 0.5 * (q2 * CEQCR * fq2)routed_Clk2

+ (r2 * fq2)routed_Clk2 + 0.5 * (s1 * CEQCD * fs1)dedicated_Clk

+ (s2 * CEQCI * fs2)IO_Clk]

(3)

Where:

Modules (CEQM)

6.7

Input Buffers (CEQI)

7.2

Output Buffers (CEQO)

10.4

Routed Array Clock Buffer Loads (CEQCR)

1.6

Dedicated Clock Buffer Loads (CEQCD)

0.7

I/O Clock Buffer Loads (CEQCI)

0.9

= Number of logic modules switching at fm

= Number of input buffers switching at fn

= Number of output buffers switching at fp

= Number of clock loads on the first routed

array clock

= Number of clock loads on the second routed

array clock

= Fixed capacitance due to first routed array

clock

= Fixed capacitance due to second routed array

clock

= Fixed number of clock loads on the dedicated

array clock

= Fixed number of clock loads on the dedicated

I/O clock

CEQM

= Equivalent capacitance of logic modules in pF

CEQI

= Equivalent capacitance of input buffers in pF

CEQO

= Equivalent capacitance of output buffers in

CEQCR = Equivalent capacitance of routed array clock

in pF

CEQCD = Equivalent capacitance of dedicated array

clock in pF

CEQCI

= Equivalent capacitance of dedicated I/O clock

in pF

= Output lead capacitance in pF

= Average logic module switching rate in MHz

= Average input buffer switching rate in MHz

= Average output buffer switching rate in MHz

fq1

= Average first routed array clock rate in MHz

fq2

= Average second routed array clock rate in

MHz

fs1

= Average dedicated array clock rate in MHz

fs2

= Average dedicated I/O clock rate in MHz

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