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STM32F103XC Fiches technique(PDF) 43 Page - STMicroelectronics |
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STM32F103XC Fiches technique(HTML) 43 Page - STMicroelectronics |
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43 / 118 page ![]() STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics 43/118 Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Max Unit TA = 85 °C TA = 105 °C IDD Supply current in Sleep mode External clock(1), all peripherals enabled 1. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz; external clock is 9 MHz for fHCLK = 36 MHz. 72 MHz(2) 2. Data based on characterization results, tested in production at VDD max, fHCLK max. and TA max. 66 67 mA 48 MHz(3) 3. Based on characterization, not tested in production. 43.5 45.5 36 MHz(3) 33 35 24 MHz(3) 23 24.5 16 MHz(3) 16 18 8 MHz(3) 910.5 External clock(1), all peripherals disabled(3) 72 MHz 33 33.5 48 MHz 23 23.5 36 MHz 18 18.5 24 MHz 13 13.5 16 MHz 10 10.5 8 MHz 6 6.5 |
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