AM29BDS640G datasheet(63/77 Pages) AMD

No de pièce	AM29BDS640G

Description	64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

PDF	77 Pages

Scroll/Zoom	100%

Fabricant	AMD [Advanced Micro Devices]

Site Internet	http://www.amd.com

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63 / 77 page

May 9, 2006 25903C2

Am29BDS640G

Data

Sheet

AC Characteristics

Notes:

1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.

2. “In progress” and “complete” refer to status of program operation.

3. A21–A12 are don’t care during command sequence unlock cycles.

4. Addresses are latched on the first of either the rising edge of AVD# or the active edge of CLK.

5. Either CS# or AVD# is required to go from low to high in between programming command sequences.

6. The Synchronous programming operation is independent of the Set Device Read Mode bit in the Burst Mode

Configuration Register.

7. CLK must not have an active edge while WE# is at VIL.

8. AVD# must toggle during command sequence unlock cycles.

Figure 23. Synchronous Program Operation Timings

OE#

CE#

Data

Addresses

AVD

WE#

CLK

VCC

555h

tAS

tWP

tAH

tWC

tWPH

tVCS

tDH

tCH

Progress

tWHWH1

Complete

Program Command Sequence (last two cycles)

Read Status Data

tDS

tAVDP

A0h

tAVSW

tACS

tCAS

tCSW2

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