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UPD17062 Fiches technique(PDF) 202 Page - Renesas Technology Corp

No de pièce UPD17062
Description  MOS INTEGRATED CIRCUIT
PDF  298 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17062 Fiches technique(HTML) 202 Page - Renesas Technology Corp

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15.5.2
Example of Using Output Ports (P0C, P1A)
The output ports output the contents of the output latch from each pin.
Output data can be set by executing an instruction, such as the MOV instruction, to write the contents of
the port register for each pin.
To output a high level signal to each pin, write 1. To output a low level signal to each pin, write 0.
However, the P1A3, P1A2, P1A1, and P1A0 pins, because of the N-ch open-drain output, are set to the floating
state (Hi-Z) when a high level signal is output.
Upon executing an instruction to read the port register, such as the SKT instruction, the contents of the
output latch are read.
15.5.3
State of Output Ports (P0C, P1A) at Reset
(1) At power-on reset
The contents of the output latch are output.
Since the contents of the output latch are “indefinite”, “indefinite” values are output until the output latch
is initialized by the program.
(2) At CE reset
The contents of the output latch are output.
Since the contents of the output latch are retained, the output data remains as is upon a CE reset.
(3) At clock stop
The contents of the output latch are output.
Since the contents of the output latch are retained, the output data remains as is at clock stop.
Therefore, the output latch must be initialized by the program as necessary.
(4) During halt state
The contents of the output latch are output.
Since the contents of the output latch are retained, the output data remains as is during the halt state.



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