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CSG14K_CSG8K Fiches technique(PDF) 48 Page - ams AG |
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CSG14K_CSG8K Fiches technique(HTML) 48 Page - ams AG |
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48 / 113 page ![]() Document Feedback CSG14K_CSG8K Functional Description Datasheet • PUBLIC DS000571 • v1-00 • 2020-Dec-15 112 │ 47 Figure 49: State Diagram: Streaming Mode Because of the nature of the streaming mode, there is no such thing as invalid or special control timing. Once started, it will be forever looping and all further REQ_EXP and REQ_FRAME pulses are ignored. 7.2.8 Software Commands Figure 50: Software Command Registers Reg.Name Bank Addr Bits CMD_REGS.CMD_RST_SOFT_N 0 6 [0] CMD_REGS.CMD_REQ_EXP 0 6 [1] CMD_REGS.CMD_REQ_FRAME 0 6 [2] CMD_REGS.CMD_HALT_BLOCK 0 6 [3] CMD_REGS.CMD_HALT_NBLOCK 0 6 [4] The register bits CMD_REQ_EXP and CMD_REQ_FRAME are equivalent to their sensor input counterparts REQ_EXP and REQ_FRAME. The sensor REQ_EXP and REQ_FRAME inputs can therefore be tied low to use the register uploads for frame timing control. By setting the CMD register bit, the respective command is sent to the internal control logic. The CMD bits are not automatically 1st EXPOSURE GLOB IDLE RESET READOUT (N) EXPOSURE (N+1) rising (REQ_EXP) after (exposure time) after (frame time) after (ExpDelay) ** ** => ExpDelay = frame time – exp time HALT command |
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