 |
Moteur de recherche de fiches techniques de composants électroniques |
|
|
Moteur de recherche de fiches techniques de composants électroniques |
|
STWBC2-HP Fiches technique(PDF) 40 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STWBC2-HP Fiches technique(HTML) 40 Page - STMicroelectronics |
|
|
40 / 96 page  Figure 42. Gate driver control signal configuration The IO mode is controlled per pair GPIO_DR0/1 and GPIO_DR2/3 by the following logic: Figure 43. IO mode configuration Note that some signals in the above figure may be not aligned with the RTL implementation. • IOx_mode[1:0] & IOy_mode[1:0]: Configure the mode of operation of each I/O pin: – 00: high Z – 01: push-pull output at 0 – 10: push-pull output at 1 – 11: output driven by HS_in or LS_in • GD_IF_sel: Select the interface with the external gate driver: – 0 : Direct interface, HS_in drives IOx, LS_in drives IOy – 1: PWM/EN interface with IOx behaving as EN signal and IOy as PWM signal. When GD_IF_sel is 1, the state of IOx/IOy follows the following truth in Table 28: STWBC2-HP Digital AFE functions DS13825 - Rev 1.0 page 40/96 |
|
Lien URL |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Lien vers la fiche technique | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
French ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
