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ST20-GP6 Fiches technique(PDF) 57 Page - STMicroelectronics |
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ST20-GP6 Fiches technique(HTML) 57 Page - STMicroelectronics |
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57 / 123 page ![]() ST20-GP6 57/123 Figure 10.1 Memory allocation 00000000 7FFFFFFF 80000000 64k internal SRAM C0000000 40000000 On-chip peripheral registers are mapped into this bank. Addresses shown are physical addresses. On-chip peripherals Subsystem channels Traps/ exceptions Internal SRAM 20000000 80000000 MemStart 8000FFFF 81000000 7F000000 128k internal ROM EMI configuration Diagnostic controller 00003FFF 00002000 7FFE0000 RESERVED RESERVED 80003FFF Battery backed RAM 00003000 00010000 RESERVED |
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