LCD CONTROLLER with VRAM

M66273FP

MITSUBISHI <DIGITAL ASSP>

Ver.3.1 Dec,1999

PIN DESCRIPTIONS

Pin name

Input/

Output

Function

Number

of pins

D<15:0>

Input/

Output

MPU data bus

16

1

HWR

A<14:0>

Input

15

MPU address bus

When selecting 8-bit MPU, use A<14:0>.

When selecting 16-bit MPU, use A<14:1> as a address bus. By combining A<0> and BHE, access to

internal VRAM can be gained.

When driving two screens (dual scan mode), notice that the allowable setup range of VRAM address

is restricted. When IOCS control use A <7:0>, and MCS control use A <14:0> for selecting address of

control register.

1

Low-Write strobe input

When this pin is "L", write data to the internal control register or VRAM.

LWR

1

WAIT

WAIT output for MPU

"L" at the timing of falling edge of overlapping with MCS and RD or LWR and HWR. And in case of

using WAITCNT input, change WAIT to "L" at timing of falling edge of WAITCNT on MCS = "L".

And WAIT output return to "H" at synchronization with the rising edge of MPUCLK after internal

processing. (Output WAIT only when requested access from MPU to VRAM is gained during cycle

steal access.)

Chip select input of control register

When this pin is "L", select the internal control register. Assign to I/O space of MPU.

1

IOCS

Chip select input of VRAM / control register

When this pin is "L", select the internal VRAM. Assign to memory space of MPU.

And this pin can for chip select of control register.

In detail, refer to "COMBINATIONS OF CONTROL INPUT PINS ON THE MPU INTERFACE" and "CONTROL

REGISTER".

1

MCS

1

RD

Read strobe input

When this pin is "L", read data from the internal control register or VRAM.

MPUSEL

8/16-bit MPU select input

1

Reset input

Use reset signal of MPU. When this pin is "L", initialize (reset) all internal control registers and

counters.

1

RESET

MPUCLK

MPU clock

Input system clock output from MPU.

1

BHE

1

Bus-High-Enable input

This pin is valid when using 16-bit MPU controlling byte access with A<0> and BHE.

Item

MPU

interface

High-Write strobe input

When this pin is "L", write data to the internal VRAM. HWR is valid only in using 16-bit MPU

controlled byte access by LWR and HWR.

WAITCNT

Wait control input

This pin is used for controlling WAIT output timing when requested access from MPU to VRAM.

Use this pin, when it is necessary to output WAIT earlier than the timing of falling edge of overlapping with

MCS and RD or LWR and HWR.

And then connect AS, ALE or etc of MPU.

Connect WAITCNT to "VDD" or "VSS", when it is necessary to output WAIT at the timing of falling edge of

overlapping with MCS and RD or LWR and HWR.

1

3

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input

Output

CSE

Cycle Steal Enable output

State output of internal cycle steal access.

1

Output