LSM6DSV datasheet(98/187 Pages) STMICROELECTRONICS

98 / 187 page

9.65

UI_SPI2_SHARED_0 (65h)

UI / SPI2 shared register 0 (R/W)

Table 172. UI_SPI2_SHARED_0 register

Table 173. UI_SPI2_SHARED_0 register description

D[7:0]

Volatile byte is used as a contact point between the primary and secondary interface host. These shared

registers are accessible only by one interface at a time and access is managed through the UI_SHARED_ACK

and UI_SHARED_REQ bits of register UI_HANDSHAKE_CTRL (64h) and the SPI2_SHARED_ACK and

SPI2_SHARED_REQ bits of register SPI2_HANDSHAKE_CTRL (6Eh).

9.66

UI_SPI2_SHARED_1 (66h)

UI / SPI2 shared register 1 (R/W)

Table 174. UI_SPI2_SHARED_1 register

Table 175. UI_SPI2_SHARED_1 register description

D[7:0]

Volatile byte is used as a contact point between the primary and secondary interface host. These shared

registers are accessible only by one interface at a time and access is managed through the UI_SHARED_ACK

and UI_SHARED_REQ bits of register UI_HANDSHAKE_CTRL (64h) and the SPI2_SHARED_ACK and

SPI2_SHARED_REQ bits of register SPI2_HANDSHAKE_CTRL (6Eh).

9.67

UI_SPI2_SHARED_2 (67h)

UI / SPI2 shared register 2 (R/W)

Table 176. UI_SPI2_SHARED_2 register

Table 177. UI_SPI2_SHARED_2 register description

D[7:0]

Volatile byte is used as a contact point between the primary and secondary interface host. These shared

registers are accessible only by one interface at a time and access is managed through the UI_SHARED_ACK

and UI_SHARED_REQ bits of register UI_HANDSHAKE_CTRL (64h) and the SPI2_SHARED_ACK and

SPI2_SHARED_REQ bits of register SPI2_HANDSHAKE_CTRL (6Eh).

LSM6DSV

UI_SPI2_SHARED_0 (65h)

DS13476 - Rev 2

page 98/187

LSM6DSV Fiches technique(PDF) 98 Page - STMicroelectronics