LSM6DSV datasheet(69/187 Pages) STMICROELECTRONICS

69 / 187 page

9.21

CTRL9 (18h)

Control register 9 (R/W)

Table 66. CTRL9 register

0(1)

HP_REF_

MODE_XL

XL_FASTSET

TL_MODE

HP_SLOPE_

XL_EN

LPF2_XL_EN

0(1)

USR_OFF_W

USR_OFF_

ON_OUT

1. This bit must be set to 0 for the correct operation of the device.

Table 67. CTRL9 register description

HP_REF_MODE_XL

Enables accelerometer high-pass filter reference mode (valid for high-pass path -

HP_SLOPE_XL_EN bit must be 1). Default value: 0

(0: disabled, 1: enabled)(1)

XL_FASTSETTL_MODE

Enables accelerometer LPF2 and HPF fast-settling mode. The filter sets the first sample after

writing this bit. Active only during device exit from power-down mode. Default value: 0

(0: disabled, 1: enabled)

HP_SLOPE_XL_EN

Accelerometer slope filter / high-pass filter selection. Refer to Figure 30. Default value: 0

(0: low-pass filter path selected;

1: high-pass filter path selected)

LPF2_XL_EN

Accelerometer high-resolution selection. Refer to Figure 30. Default value: 0

(0: output from first stage digital filtering selected;

1: output from LPF2 second filtering stage selected)

USR_OFF_W

Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR

(75h). Default value: 0

(0: 2-10 g/LSB;

1: 2-6 g/LSB)

USR_OFF_ON_OUT

Enables accelerometer user offset correction block; it is valid for the low-pass path. Refer to

Figure 30. Default value: 0

(0: accelerometer user offset correction block bypassed;

1: accelerometer user offset correction block enabled)

1. When enabled, the first output data has to be discarded.

LSM6DSV

CTRL9 (18h)

DS13476 - Rev 2

page 69/187

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