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L99LD20 Fiches technique(PDF) 29 Page - STMicroelectronics |
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L99LD20 Fiches technique(HTML) 29 Page - STMicroelectronics |
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29 / 61 page ![]() DS11366 Rev 3 29/61 L99LD20 SPI functional description 60 CR#4: Control Register 4 Address: 0x04h Type: R/W 3÷2 00 B_IN_W2 Buck Input Voltage Window for Buck2 (see Table 19) 1 1 Reserved This bit must be set to 1 0 Parity bit ODD parity bit check Table 15. CR#3: Control Register 3 (continued) Bit Default Name Description 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876 543210 Reserved Unused Table 16. CR#4: Control Register 4 Bit Default Name Description 23 0 WD_TRIG In order to keep device in Active mode, this bit must be cyclically toggled within a period equal to tWD to refresh the watchdog. 22÷21 00 Reserved Note: when writing on this register, bit 21 and 22 must be set to 00 20÷1 Unused 0 Parity bit ODD parity bit check Table 17. Constant VLED x TOFF selection VLED_TOFF Constant VLED x TOFF [V x µs] 0000 10 0001 12 0010 14 0011 16 0100 18 0101 20 0110 22 0111 24 1000 28 1001 32 1010 36 1011 40 1100 48 |
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