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SH7041A Fiches technique(PDF) 561 Page - Renesas Technology Corp

No de pièce SH7041A
Description  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A Fiches technique(HTML) 561 Page - Renesas Technology Corp

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Figure 14.17 is a sample flowchart for initializing the SCI.
1.Select the clock source in the serial control register (SCR).Leave RIE, TIE, TEIE, MPIE, TE,
and RE cleared to 0.
2.Select the communication format in the serial mode register (SMR).
3.Write the value corresponding to the bit rate in the bit rate register (BRR) unless an external
clock is used.
4.Wait for at least the interval required to transmit or receive one bit, then set TE or RE in the
serial control register (SCR) to 1. Also set RIE, TIE, TEIE, and MPIE. The TxD, RxD pins
becomes usable in response to the PFC corresponding bits and the TE, RE bit settings.
Start of initialization
Clear TE and RE bits to 0 in SCR
1-bit interval elapsed?
Set TE and RE to 1 in SCR;
Set RIE, TIE, TEIE, and MPIE bits
Yes
No
1
Set RIE, TIE, TEIE, MPIE, CKE1,
and CKE0 bits in SCR
(TE and RE are 0)
End
Wait
Select transmit/receive
format in SMR
Set value in BRR
2
3
4
Figure 14.17 Sample Flowchart for SCI Initialization



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