FXLS8967AF datasheet(65/98 Pages) NXP

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NXP Semiconductors

FXLS8967AF

3-Axis Low-g Accelerometer

Field

Description

ORIENT_ENABLE

Orientation detection function enable

0 (default): Orientation detection function is disabled.

1: Orientation detection function is enabled.

Table 85. ORIENT_CONFIG register (address 29h) bit description...continued

15.28 ORIENT_DBCOUNT register (address 2Ah)

The

ORIENT_DBCOUNT register sets the debounce count used for validating an

orientation state change. The selected ODR in LPM and HPM modes, and the effective

ODR when operating in FPM determine the debounce counter period. Calculate

the minimum debounce latency time by ODR–1 *

ORIENT_DBCOUNT[7:0]. For

example, with an ODR of 100 Hz and debounce count value of 10, the new orientation

must be maintained for 100 ms before it is recognized as a valid orientation and

ORIENT_STATUS[NEW_ORIENT] is asserted. A transition from Standby to Active, a

transition from Active to Standby, or a change in the auto-WAKE/SLEEP mode resets the

internal orientation debounce counter.

Bit

Name

ORIENT_DBCOUNT[7:0]

Reset

Access

R/W

Table 86. ORIENT_DBCOUNT register (address 2Ah) bit allocation

Field

Description

7 to 0

ORIENT_

DBCOUNT[7:0]

8-bit unsigned orientation debounce counter value

A new orientation must be maintained for the minimum number of ODR periods specified

in order for the orientation to be considered valid before asserting the

ORIENT_

STATUS[NEW_ORIENT] event flag.

ORIENT_CONFIG[ORIENT_DBCNTM] controls the counter behavior.

The selected ODR in LPM and HPM modes and the effective ODR when operating in FPM

determines the debounce counter period. Calculate the minimum debounce latency time by:

Debounce_time = (ODR–1 * ORIENT_DBCOUNT)

Note: If the applied acceleration is greater than 1.25 g on any axis, the debounce counter is

held at the current value (frozen).

Table 87. ORIENT_DBCOUNT register (address 2Ah) bit description

15.29 ORIENT_BF_ZCOMP register (address 2Bh)

Orientation back/front and Z-tilt angle compensation register

Bit

Name

ORIENT_BKFR[1:0]

—

ORIENT_ZLOCK[2:0]

Reset

Access

R/W

Table 88. ORIENT_BF_ZCOMP register (address 2Bh) bit allocation

FXLS8967AF

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 27 April 2021

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