Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

STV9936S Fiches technique(PDF) 43 Page - STMicroelectronics

No de pièce STV9936S
Description  120-MHz On-Screen Display for Monitors with 4 True Independent Window Displays
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STV9936S Fiches technique(HTML) 43 Page - STMicroelectronics

Back Button STV9936S Datasheet HTML 39Page - STMicroelectronics STV9936S Datasheet HTML 40Page - STMicroelectronics STV9936S Datasheet HTML 41Page - STMicroelectronics STV9936S Datasheet HTML 42Page - STMicroelectronics STV9936S Datasheet HTML 43Page - STMicroelectronics STV9936S Datasheet HTML 44Page - STMicroelectronics STV9936S Datasheet HTML 45Page - STMicroelectronics STV9936S Datasheet HTML 46Page - STMicroelectronics STV9936S Datasheet HTML 47Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 43 / 48 page
background image
43/48
STV9936P/S
Electrical and Timing Characteristics
11.4
I²C Bus Characteristics
Table 48: Characteristics of the SDA an SCL bus lines for F/S-mode I²C-bus devices
Symbol
Parameter
Standard mode
Fast mode
Unit
Min.
Max.
Min.
Max.
I²C Interface: SDA and SCL
tSP
Pulse width of spikes which must be suppressed
by the input filter
n/a
n/a
0
50
ns
fSCL
SCL clock frequency
0
100
0
400
kHz
tHD;STA
Hold time (repeated) START Condition. After this
period, the first clock pulse is generated
4.0
0.6
µs
tLOW
LOW period of the SCL clock
4.7
1.3
µs
tHIGH
HIGH period of the SCL clock
4.0
0.6
µs
tSU; tSTA
Set-up time for a repeated START condition
4.7
0.6
µs
tHD;DAT
Data hold time
0
3.45
0
0.9
µs
tSU;DAT
Data set-up time
250
100
ns
tr
Rise time of both SCL and SDA signals
1000
20 + 0.1Cb
300
ns
tf
Fall time of both SCL and SDA signals
300
20 + 0.1Cb
300
ns
tSU; tSTO
Set-up time for STOP condition
4.0
0.6
µs
tBUF
Bus free time between a STOP and a START
condition
4.7
1.3
µs
Cb
Capacitive load for each bus line
400
400
pF
Figure 17: Definition of Timing for F/S-modes
handbook, full page width
S
Sr
tSU;STO
tSU;STA
tHD;STA
tHIGH
tLOW
tSU;DAT
tHD;DAT
tf
SDA
SCL
P
S
tBUF
tr
tf
tr
tSP
tHD;STA



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


Fiches technique Télécharger

Go To PDF Page


Lien URL



ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Lien vers la fiche technique    |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com