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STV9936S Fiches technique(PDF) 31 Page - STMicroelectronics |
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STV9936S Fiches technique(HTML) 31 Page - STMicroelectronics |
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31 / 48 page ![]() 31/48 STV9936P/S Pixel Clock Generator 6 Pixel Clock Generator The Pixel Clock Generator is used to synchronize the display clock with the horizontal flyback (HFLY) signal. This generator is based on a PLL function used to perform correct jitter. The pixel frequency is defined with the horizontal line frequency and the horizontal resolution. Pixel Frequency (fPIXEL) = 12 x HR[6:0] x fHLINE The VCO[1:0] value is used to select the appropriate curve partition of the VCO. Table 34: VCO Curve Partition VCO Value (Binary) VCO Curve Partition 00 7.68 MHz < HPIXEL < 15 MHz (Default Value) 01 15 MHz < HPIXEL < 30 MHz 10 30 MHz < HPIXEL < 60 MHz 11 60 MHz < HPIXEL < 120 MHz Table 35: VCO Range FWR FAC Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 80h 00h 0h VCO[1:0] |
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