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STV9936S Fiches technique(PDF) 13 Page - STMicroelectronics |
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STV9936S Fiches technique(HTML) 13 Page - STMicroelectronics |
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13 / 48 page ![]() 13/48 STV9936P/S Window Specifications 3.1 Enable Display The Enable Display command for each window is selected by bits ENW1, ENW2, ENW3 and ENW4. If the ENWi bit is set to 1, the corresponding window is displayed. 3.2 Origin Positions for the 4 Windows The 4 windows are arranged in a vertical frame whose origin coordinates are the horizontal delay (HD) and the vertical delay (VD) located at the upper left-hand corner of the monitor screen. When the HD and VD values are changed, the 4 windows within the frame position are automatically shifted by the same value. The origin (HD, VD) can be programmed anywhere on the screen. Adjusting the origin position is used to globally reposition the OSD windows. The advantages of this system are easier programming, the possibility to adapt the position of all windows at a single time without changing the relative position of each window and the possibility for the user to program all 4 window positions. 3.2.1 General Horizontal Delay (HD) The general horizontal delay defines the horizontal position of the origin coordinate for all four OSD windows. The horizontal delay is selected by bits HD[6:0]. A general horizontal offset is also applied: General Horizontal Offset = 50 pixels − Phase Error Detection Pulse Width (in pixels) The range of the horizontal delay is from 50 to 812 pixels, in steps of 6 pixels each. General Horizontal Delay = HD[6:0] x 6 pixels + General Offset (in pixels) The default value is 0h (left-hand side of the monitor screen). 3.2.2 General Vertical Delay (VD) The general vertical delay defines the vertical position of the origin coordinate for all four OSD windows. The vertical delay is selected by bits VD[7:0]. A general vertical offset of 2 scan lines is also applied. Table 5: Enable Display FWR FAC Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 80h 07h 0h ENW4 ENW3 ENW2 ENW1 Table 6: Origin of Windows on Horizontal Axis: Horizontal Delay FWR FAC Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 80h 04h 0h HD[6:0] Table 7: Origin of Windows on Vertical Axis: Vertical Delay FWR FAC Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 80h 05h 0h VD[7:0] |
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