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STM32F070F6 Fiches technique(PDF) 40 Page - STMicroelectronics |
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STM32F070F6 Fiches technique(HTML) 40 Page - STMicroelectronics |
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40 / 83 page ![]() Electrical characteristics STM32F070CB/RB/C6/F6 40/83 DocID027114 Rev 3 6.3.2 Operating conditions at power-up / power-down The parameters given in Table 21 are derived from tests performed under the ambient temperature condition summarized in Table 20. 6.3.3 Embedded reset and power control block characteristics The parameters given in Table 22 are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 20: General operating conditions. VDDA Analog operating voltage Must have a potential equal to or higher than VDD 2.4 3.6 V VIN I/O input voltage TC and RST I/O -0.3 VDDIOx+0.3 V TTa I/O -0.3 VDDA+0.3(2) FT and FTf I/O -0.3 5.5(2) BOOT0 0 5.5 PD Power dissipation at TA = 85 °C for suffix 6 (1) LQFP64 - 455 mW LQFP48 - 364 TSSOP20 - 263 TA Ambient temperature for the suffix 6 version Maximum power dissipation -40 85 °C Low power dissipation(2) -40 105 TJ Junction temperature range Suffix 6 version -40 105 °C 1. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax. 2. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.4: Thermal characteristics). Table 20. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Table 21. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate - 0 ∞ µs/V VDD fall time rate 20 ∞ tVDDA VDDA rise time rate - 0 ∞ VDDA fall time rate 20 ∞ Table 22. Embedded reset and power control block characteristics Symbol Parameter Conditions Min Typ Max Unit VPOR/PDR(1) Power on/power down reset threshold Falling edge(2) 1.80 1.88 1.96(3) V Rising edge 1.84(3) 1.92 2.00 V |
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