CS89712 datasheet(31/170 Pages) CIRRUS

31 / 170 page

CS89712

DS502PP2

is LEDDRV, and the input from the photodiode is

PHDIN. Modem status lines will cause an interrupt

(which can be masked) irrespective of whether the

SIR interface is being used.

Both the UARTs operate in a similar manner to the

industry standard 16C550A. When CTS is deas-

serted on the UART, the UART does not stop shift-

ing the data. It relies on software to make an

appropriate response to the interrupt generated.

Baud rates supported for both the UARTs are de-

pendent on frequency of operation. When operat-

ing from the internal PLL, the interface supports

various baud rates from 115.2 kbits/s downwards.

The master clock frequency is chosen so that most

of the required data rates are obtainable exactly.

2.17 Synchronous Serial Interfaces

The CS89712 has the synchronous serial interfaces

shown in Table 21. Three sets of serial interface

(DAI, CODEC, and SSI2) pins are multiplexed to-

gether. On power up, both the DAISEL and SER-

SEL register bits are low, enabling the master /

slave SSI2 to these pins (and configuring it for

slave mode operation to avoid external contention).

Table 22 contains pin definition information for the

three multiplexed interfaces.

The internal names given to each of the three inter-

faces are unique to help differentiate them from

each other. The sections below that describe each

of the three interfaces will use their respective

unique internal pin names for clarity.

Type

Comments

Referred To As

Max. Transfer Speed

SPI / Microwire 1

Master mode only

ADC Interface

128 kbits/s

SPI / Microwire 2

Master / slave mode

SSI2 Interface

512 kbits/s

DAI Interface

CD quality DACs and ADCs

DAI Interface

1.536 Mbits/s

CODEC Interface

CODEC

Interface

64 kbits/s

Table 21. Serial Interface Options

BGA

Ball

External

Pin Name

SSI2

Slave Mode

(Internal Name)

SSI2

Master Mode

CODEC

Internal Name

DAI

Internal Name

Strength

SSICLK

SSICLK = serial bit

clock; Input

Output

PCMCLK =

Output

SCLK =

Output

SSITXFR

SSITXFR = TX

frame sync; Input

Output

PCMSYNC = Output

LRCK = Output

SSITXDA

SSITXDA = TX

data; Output

Output

PCMOUT = Output

SDOUT = Output

SSIRXDA

SSIRXDA = RX

data; Input

Input

PCMIN = Input

SDIN = Input

SSIRXFR

SSIRXFR = RX

frame sync; Input

Output

p/u

(use a 10k pull-up)

MCLK

Table 22. Serial-Pin Assignments

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