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ACHIEVING HIGH ACCURACY AND 13-BIT RESOLUTION WITH ST7LITE2 ADC

A deliberate offset has been introduced in the design of the ST7LITE2 amplifier because in its

absence, for the 0V input, the amplifier goes into saturation and the final stage driver transistor

inside the amplifier can’t drive the capacitive load inside the ADC within the sampling period.

This phenomenon also leads to nonlinearity in the transfer curve around 0V input. By intro-

ducing the offset, the driver transistor is kept in the active region and this problem is avoided.

Therefore the amplifier offset is a design factor and not an error.

2.2.1.1 AMPLIFIER OFFSET VARIATION WITH RESPECT TO TEMPERATURE

One more important point is offset variation with respect to temperature. The offset is quite

sensitive to temperature variations. In order to ensure a good reliability in measure-

ments, the offset must be recalibrated periodically i.e. may be after “N” seconds while ap-

plication is running depending on application requirement and temperature variation.

2.2.2 AMPLIFIER GAIN

The typical gain of the amplifier is 8 by design, which is a ratio result of 2 on-chip resistors. The

mismatch in these 2 resistors can create gain error, depending on the voltage coefficient and

2.2.3 TOTAL UNADJUSTED ERROR (TUE)

The TUE is a maximum deviation between the actual and the ideal transfer curves.

plifier is ON without applying any software or hardware filtering over the temperature range –

40°C to +90°C. This is a global TUE since it includes ADC, Amplifier gain, Application and

Offset Errors. This can be reduced using the method explained in Section 3.

Table 2 Total Unadjusted Error (Temperature: –40°C to +90°C)

2.2.4 TOTAL ERROR IN PERCENTAGE (TE%)

equal to ±10 LSB. The graphs (Figure 2 and Figure 3) show the variation in error with respect

-45

-20

+25

+90

Error in LSB

-12

-7

0

+13

TUE

3.6V

350mV

± 10 LSB

5.0V

500mV

± 10 LSB