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ACHIEVING HIGH ACCURACY AND 13-BIT RESOLUTION WITH ST7LITE2 ADC

Figure 1 ADC Block Diagram

2.1.1 ADC Registers

The ADC functionality is driven using 3 main registers ADCCSR, ADCDRH and ADCDRL.

These are described below.

CONTROL/STATUS REGISTER (ADCCSR)

This is a read/write register used to:

- Select the analog input channel by using bits CH[2:0]

- Turn the ADC ON / OFF (ADON)

- Select the ADC clock speed (SPEED)

- Obtain the status of conversion complete cycle (EOC)

7

0

EOC

SPEED ADON

0

0

CH2

CH1

CH0

CH2

CH1

EOC SPEED ADON

0

CH0

ADCCSR

AIN0

AIN1

ANALOG TO DIGITAL

CONVERTER

AINx

ANALOG

MUX

D4

D3

D5

D9

D8

D7

D6

D2

ADCDRH

3

D1

D0

ADCDRL

00

0

AMP

SLOW

AMP

0

HOLD CONTROL

x 1 or

x 8

AMPSEL

bit

SEL

0

1

1

0

DIV 2

DIV 4

SLOW

bit

CAL

2