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Revision 1.07

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AS1130

Datasheet - R e g i s t e r D e s c r i p t i o n

AS1130 Config Register (0x06)

Per default this register is set to 0x00.

Interrupt Mask Register (0x07)

Per default this register is set to 0x20.

Table 20. AS1130 Config Register Format

0x06 AS1130 Config Register

Bit

Bit Name

Default

Access

Bit Description

7

low_vdd_rst

0

R/W

changed

6

low_vdd_stat

0

R/W

This bit indicates the supply status

accordingly and pin IRQ is triggered.

control an external DC/DC Converter or Charge Pump. In this case pin IRQ

can’t be used for interrupt functionality, the Interrupt Status REgister will be

updated accordingly.

5

led_error_correction

0

R/W

This bit defines the LED open handling

0: open LEDs which are detected at LED open test, are NOT disabled

1: open LEDs which are detected at LED open test, are disabled

4

dot_corr

0

R/W

Analog current DotCorrection

1

0: disabled

1: enabled

1. This configuration is locked after the first write access to ON/OFF, PWM od DotCorrection data section. Unlock can be performed only by

a reset of the device.

3

common_addr

0

R/W

I²C Common Address

0: disabled

1: enabled (all AS1130 are reacting on the same address “0111111”)

2:0

mem_conf

000

R/W

Define Memory Configuration

1

(see Table 8 on page 14)

000: Invalid Configuration (default value)

001: RAM Configuration 1

010: RAM Configuration 2

011: RAM Configuration 3

100: RAM Configuration 4

101: RAM Configuration 5

110: RAM Configuration 6

Table 21. Interrupt Mask Register Format

0x07 Interrupt Mask Register

Bit

Bit Name

Default

Access

Bit Description

7

selected_pic

0

R/W

IRQ pin triggers if defined Frame is displayed (see Interrupt Frame

Definition Register (0x08) on page 26)

0: disabled

1: enabled

6

watchdog

0

R/W

IRQ pin triggers if the I²C watchdog triggers

0: disabled

1: enabled

5

por

1

R/W

IRQ pin triggers if POR is active

0: disabled

1: enabled