[AK8975/C]

SPI, set SI pin and SO pin wired-OR externally.

CSB pin=“L”:

4-wire SPI

CSB pin=“H”:

7.1.

4-wire SPI

The 4-wire SPI consists of four digital signal lines: SK, SI, SO, and CSB. It is compliant with sequencial read

operation.

Data consists of Read/Write control bit (R/W), register address (7bits) and control data (8bits).

CSB pin is low active. Input data is taken in on the rising edge of SK pin, and output data is changed on the

falling edge of SK pin. (SPI MODE3)

Communication starts when CSB pin transits to “L” and stops when CSB pin transits to “H”. SK pin must be

“H” during CSB pin is in transition. Also, it is prohibited to change SI pin during CSB pin is “H” and SK pin is

“H”.

7.1.1.

Writing Data

Input 16 bits data on SI pin in synchronous with the 16-bit serial clock input on SK pin. Out of 16 bits input

data, the first 8 bits specify the R/W control bit (R/W=“0” when writing) and register address (7bits), and the

latter 8 bits are control data (8bits). When any of addresses listed on Table 8.1 is input, AK8975/C recognizes

that it is selected and takes in latter 8 bits as setting data.

If the number of clock pulses is less than 16, no data is written. If the number of clock pulses is more than 16,

data after the 16th clock pulse on SI pin are ignored.

It is not compliant with sereal write operation for multiple addresses.

CSB

SK

SI

(INPUT)

1

RW

SO

(OUTPUT)

Hi-Z

A6

A5

A4

A3

A2

A1

A0

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

D7

D6

D5

D4

D3

D2

D1

D0

Figure 7.1 4-wire SPI Writing Data

MS1187-E-02

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2010/05