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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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L6460 Fiches technique(PDF) 59 Page - STMicroelectronics |
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L6460 Fiches technique(HTML) 59 Page - STMicroelectronics |
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59 / 139 page  L6460 Power bridges Doc ID 17713 Rev 1 59/139 14.1 Possible configurations The selection of the bridge configuration is done through SPI, by writing the MtrXTable[1:0] bits in the MtrXCfg register. The table below shows the correspondence between MtrXTable[1:0] bits and the bridge configuration. Bridge 1 & 2 can be paralleled by means of Mtr1_2Parallel bit in the Mtr1_2Cfg register: Bridge 1 and 2 paralleled will form superbridge1, bridge X side A and bridge X side B paralleled form SuperHalfBridgeX or SuperSwitchX. Bridge 3 & 4 can be configured by means of Mtr3_4CfgTable[1:0] bits in the Mtr3_4Cfg register according to following table: The possible configurations for the bridges are described in the following. Table 16. Bridge selection MtrXTable[1] MtrXTable[0] Bridge configuration 00 Full bridge 0 1 High or low side switch 1 0 Half bridge 1 1 High or low side switch Table 17. Bridge 3 and 4 configuration Mtr3_4CfgTable[1] Mtr3_4CfgTable[0] Bridge 3 and 4 configuration 0 0 Two independent bridges 0 1 Two bridges in parallel 1 0 Stepper motor 1 1 Stepper motor |
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