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H8SX1663 Fiches technique(PDF) 708 Page - Renesas Technology Corp |
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H8SX1663 Fiches technique(HTML) 708 Page - Renesas Technology Corp |
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708 / 1158 page ![]() Section 15 Serial Communication Interface (SCI, IrDA, CRC) Rev.1.00 Jun. 07, 2006 Page 656 of 1102 REJ09B0294-0100 RxD TxD SCK Clock P φ P φ/4 P φ/16 P φ/64 TEI TXI RXI ERI SCMR SSR SCR SMR Transmission/ reception control Baud rate generator BRR Module data bus RDR TSR RSR Parity generation Parity check [Legend] RSR: Receive shift register RDR: Receive data register TSR: Transmit shift register TDR: Transmit data register SMR: Serial mode register TDR External clock SCR: Serial control register SSR: Serial status register SCMR: Smart card mode register BRR: Bit rate register SEMR: Serial extended mode register (available only for SCI_2) Average transfer rate generator (SCI_2) At 10.667-MHz operation: 115.192 kbps 460.784 kbps At 16-MHz operation: 115.192 kbps 460.784 kbps 720 kbps At 32-MHz operation: 720 kbps Figure 15.1 Block Diagram of SCI_0, 1, 2, and 4 |
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