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ST52T410 Fiches technique(PDF) 33 Page - STMicroelectronics |
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ST52T410 Fiches technique(HTML) 33 Page - STMicroelectronics |
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33 / 84 page ![]() ST52T410/ST52T420/E420 33/84 4.6 Interrupts and Low power mode All interrupts allow the processor to leave the WAIT low power mode. Only the external Interrupt allows the processor to leave the HALT low power mode. 4.7 Interrupt RESET An eventually pending interrupt can be reset with the instruction RINT j, which resets the interrupt j-th where j identifies the peripherals as described in thefollowing table(seeTable4.4). The assembler instruction: RINT 2 Resets the PWM/Timer 1 interrupt. Note: The RINT command must be preceded from a UDGI (or MDGI) command and followed by a UEGI (or MEGI) command. WARNING: If an interrupt is reset, with the RINT instruction within its own interrupt routine, the priority level of the interrupt becomes the lowest and the routine can be immediately interrupted by a lower priority interrupt request. |
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